The present disclosure relates to a solid-state imaging device, and particularly to a CMOS solid-state imaging device and electronic equipment such as a camera having the solid-state imaging device.
As a solid-state imaging device (an image sensor), a CMOS solid-state imaging device is famous in the art. The CMOS solid-state imaging device is used for various portable terminals such as digital still cameras, digital video cameras, and camera-embedded cellular phones.
In a general CMOS solid-state imaging device, a circuit for receiving a signal of a pixel and performing CDS (collated double sampling) or AD (analog/digital) conversion thereto is generally provided to every pixel column at an end of a pixel unit in which a plurality of pixels are arranged, as disclosed in Japanese Unexamined Patent Application Publication No. 2003-18471. This circuit is called a column circuit here since it is provided to every column.
As another CMOS solid-state imaging device, also famous is a solid-state imaging device in which a circuit for receiving a pixel signal and performing CDS or AD conversion is provided to each pixel or each section of a plurality of pixels, not to each pixel column, on the premise that a semiconductor chip is laminated, as disclosed in Japanese Unexamined Patent Application Publication No. 2006-49361. In the case where a pixel signal is received for each section of a plurality of pixels, as shown in a schematic view of FIG. 15A, in a pixel unit 201 in which the plurality of pixels are arranged in a two-dimensional shape, the pixels are divided into a plurality of sections so that a region including a plurality of pixels is set to one section 202. In addition, each pixel section 202 is configured to receive a signal from one circuit as above. In each pixel section 202, pixel signals are read in order as shown by a solid line arrow 203 and a dashed line 204. Signals are read simultaneously at every pixel section 202.
Incidentally, as related technologies of the CMOS solid-state imaging device, a CMOS solid-state imaging device in which a semiconductor chip is laminated in a rear-side incident type is disclosed in International Publication No. WO 2006/129762 and Japanese Unexamined Patent Application Publication No. 2007-013089.